The PCIe specification is structured into distinct layers, each with its own rules:
The PCIe specification is defined by its (measured in GigaTransfers per second, or GT/s) and its encoding method , which determines how much raw data becomes usable bandwidth. Heqing Zhu - Data Plane Development Kit (DPDK) | PDF pcie standard specification
Over the years, several versions of the PCIe standard have been released, each with significant improvements in bandwidth and performance: The PCIe specification is structured into distinct layers,
. This predictable leap ensures that interconnect speeds stay ahead of the massive data demands from AI, cloud computing, and high-performance gaming. PCIe Generation Release Year Raw Bit Rate (per lane) x16 Bi-directional Bandwidth PCIe 4.0 2017 16 GT/s 64 GB/s PCIe 5.0 2019 32 GT/s 128 GB/s PCIe 6.0 2022 64 GT/s 256 GB/s PCIe 7.0 2025 (Spec) 128 GT/s 512 GB/s PCIe 8.0 In Dev (0.3) 256 GT/s 1.0 TB/s Sources: The Big Shift: PAM4 Signaling The most significant technical evolution in recent years occurred with PCIe Generation Release Year Raw Bit Rate (per
GT/s (Giga-transfers per second) is not the same as Gb/s. Due to encoding overhead (e.g., 128b/130b in PCIe 4.0/5.0), the effective data rate is slightly lower than the raw transfer rate.
PCIe devices can be designed with different lane counts, which affect their bandwidth and compatibility: