Pci Express Base Specification Revision 6.0 [hot]

| Parameter | PCIe 5.0 | PCIe 6.0 | Improvement | | :--- | :--- | :--- | :--- | | | 32 GT/s | 64 GT/s | 2x | | x16 Bandwidth (bidirectional) | ~128 GB/s | ~256 GB/s | 2x | | x16 Bandwidth (unidirectional) | ~64 GB/s | ~128 GB/s | 2x | | Encoding Scheme | 128b/130b NRZ | PAM-4 + FLIT | New | | FEC | Optional (Replay) | Mandatory (Lightweight) | New | | Target Markets | Cloud, Enterprise AI | AI/ML, HPC, 800G Ethernet | Expanded |

PCIe 6.0 introduces for all 64 GT/s links. Unlike previous generations where packets (TLPs and DLLPs) were variable-length, FLIT mode breaks all data into fixed-size 256-byte units (FLITs). Each FLIT contains: pci express base specification revision 6.0

PCIe 6.0 controllers and devices support: | Parameter | PCIe 5

Prior generations (1.0 through 5.0) used Non-Return to Zero (NRZ) signaling, where two voltage levels represented bits 0 and 1. PCIe 6.0 adopts . In PAM-4, each symbol period carries 2 bits (four voltage levels: -1, -1/3, +1/3, +1). PCIe 6